| Description |
viii, 63 leaves : illustrations ; 28 cm. |
| Summary |
"The thesis is organized into three papers...The first two papers evaluate three different logic mapping algorithms with defect avoidance to circumvent clustered defective cross points in nanowire reconfigurable crossbar architectures. The effectiveness of inherited redundancy and configurability utilization is demonstrated through extensive parametric simulations. The third paper discusses programming asynchronous nano crossbar architecture and demonstrates a method to find an optimal solution to the dimensions of proposed architecture through simulations"--Abstract, leaf iv. |
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